The Aethereal network on chip: concepts and lessons learned

Location: CPD room (M413) , Merz Court
Date/Time: 13th December 2011, 10:00

The real-time Aethereal network on chip (NOC) was developed over the course of some 7 years at Philips/NXP Research together with the Eindhoven university of technology. In this presentation I will describe the original requirements for the NOC, and define the essential concepts of the NOC. The concepts never changed over time, but we went through several architecture options that I will describe, including hardware, driver software, and design flow. Time permitting, I will give a brief overview of the larger CompSOC system that uses the NOC.

Kees Goossens, Faculty of Electrical Engineering; Eindhoven University of Technology

published on: 18th November 2011