School of Computing

Projects

INTO-CPS - INtegrated TOol chain for model-based design of CPSs

The aim of the INTO-CPS project is to create an integrated tool chain for comprehensive model-based design of Cyber- Physical Systems (CPSs). The tool chain will support the multidisciplinary, collaborative modelling of CPSs from requirements, through design, down to realisation in hardware and software. This will enable traceability at all stages of the development.

INTO-CPS will support the holistic modelling of CPSs, allowing system models to be built and analysed that would otherwise not be possible using standalone tools. We will integrate existing industry-strength tools with high Technology Readiness Levels (TRL 6–9) in their application domains. The solution will be based centrally around Functional Mockup Interface (FMI)-compatible co-simulation. The project focuses on the pragmatic integration of these tools, making extensions in areas where a need has been recognised. The tool chain will be underpinned by a well-founded semantic foundations that ensures the results of analysis can be trusted. The tool chain will provide powerful analysis techniques for CPSs, including connection to SysML; generation and static checking of FMI interfaces; model checking; Hardware-in-the-Loop (HiL) and Software-in-the-Loop (SiL) simulation, supported by code generation. The tool chain will allow for both Test Automation (TA) and Design Space Exploration (DSE) of CPSs. The INTO-CPS technologies will be accompanied by a comprehensive set of method guidelines that describe how to adopt the INTO-CPS approach, lowering entry barriers for CPS development. The tool chain will be tested with case studies in railways, agriculture, building and automotive.

The consortium has 4 academic and 7 industrial partners. The industrial partners comprise both tool vendors and case study owners. The INTO-CPS technology will enable experimenting with design alternatives enabling radical innovation where the overall concept is right first time, even when hardware prototypes does not yet exists.