Newcastle University

Publications

Some of the publications listed below may be downloaded via http://eprints.ncl.ac.uk/.

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• Goutis, C.E., Sheblee, J.S., Russell, G. ''2--D Array Processor Having a Controlled Pipelined Architecture for Elliptical Sparse Matrices''. In: Proceedings of IEEE Conference on Acoustics, Speech and Signal Processing. 1985.
• Russell, G. Gate Level Simulation Techniques -- Part I. Silicon Design 1985, 2(10), 3pages.
• Russell, G. Gate Level Simulation Techniques -- Part II. Silicon Design 1985, 2(11), 2 pages.
• Russell, G., Sayers, I.L., Kinniment, D.J. Improved Techniques to Enhance the Testability of VLSI Circuits. In: IEE Colloquium on Design for Testability. 1985.
• Sayers, I.L., Russell, G., Kinniment, D.J. New Directions in the Design for Testability of VLSI Circuits. In: Proceedings of ISCAS '85, Kyoto, Japan.. 1985.