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Evolution of strain engineering for Si technology

The first speaker is Anthony O'Neill, the second speaker is Sarah Olsen.

13:00, 10th October 2007, Room: Bedson Teaching Centre 1.46

Welcome to this autumns first nano materials and electronics seminar.

The first speaker is Anthony O'Neill, the second speaker is Sarah Olsen.

Evolution of strain engineering for Si technology

1) A O'Neill

Strained silicon has become established as an essential technology booster for advanced CMOS technology nodes. This tutorial will review the evolution of strain engineering, covering both global and process induced strain. The origin of channel strain and how it relates to stressors will be introduced. The performance enhancements achieved by either uniaxial or biaxial strain will be compared. The methods used to achieve channel strain and the magnitudes of such strain will be discussed. Computer simulation of channel strain will demonstrate the effectiveness of specific techniques. Characterisation and measurement of strain is critical and the techniques available and necessary for the future will be described.

Anthony O'Neill is Siemens Professor of Microelectronics at Newcastle University, UK. He has worked on strained Si since 1993 and has published many papers. In 1994 he was Visiting Scientist at MIT and from 2002-5 he was Royal Society Industry Fellow with Atmel Corp. He is an IEEE Distinguished Lecturer, a Fellow of the IET and the first academic director of the National Microelectronics Institute.


2) Sarah Olsen

Strained Si is a necessary technology booster for the nanoelectronics regime. This work shows that high levels of strain attainable from globally strained Si/SiGe platforms benefit gate leakage and reliability in addition to MOSFET channel mobility. The advantages and challenges of using globally strained Si/SiGe in MOS technology are reviewed. Device self-heating due to the low thermal conductivity of SiGe is shown to be the dominating factor behind compromised performance gains in short channel devices. Novel thin virtual substrates aimed at reducing self-heating effects are investigated. In addition to reducing self-heating, thin virtual substrates provide improved gate dielectric integrity, reliability and lifetime compared with conventional thick virtual substrates. Good agreement between experimental data and physical models enables gate leakage mechanisms to be identified.

Published: 9th October 2007