Title
Name of Student
On-Chip Sub-Pico Scheme for High Resolution Timing Measurement
Mohd Amir Abas
TESTING METHODS FOR SYSTEM-ON-CHIPS AT ELEVATED TEMPERATURES
Henning Bahr
Using Petri nets for Asynchronous Datapath and Controller Synthesis
Frank Burns
OR-causality in Low-Latency Asynchronous Circuits
Alex Bystrov
C-V Characterisation of Strained Si Multiple Hetero-Junction Capacitors as a Tool for Hetero-Junction MOSFET Channel Design
Sanatan Chattopadhyay
Asynchronous Communication Mechanisms survey
Ian Clark
Numerical Study of the Schottky Barrier Current
Cezar Dimitriu
DUAL QUANTUM WELL STRAINED SILICON/SILICON-GERMANIUM N-CHANNEL HETEROJUNCTION METAL OXIDE FIELD EFFECT TRANSISTORS FOR HIGH PERFORMANCE CMOS LOGIC
Luke Steven Driscoll
Implementation of a Three-Slot Signal ACM
Fei Hao
SiC and SiC/SiO2 micro-structures; Modeling and characteristics
Musaab Abdalla Hassan
Reciprocation Using Adders, Multipliers
Vijaykumar Holimath
Tuning of Microelectromechanical Devices
Said M M Kafumbe
Capacitance reconstruction of lossy C-V characteristics
Kelvin Sian Kiat Kwa
INVESTIGATION OF IDDX TEST METHODS FOR SOI INTEGRATED CIRCUITS
Yajian Li
Visualisation and Resolution of Coding Conflicts in Asynchronous Circuit Design
Agnes Madalinski
High Performance Strained Si/SiGe NMOSFETs Using A Novel CMOS Architecture
Sarah H Olsen
Step Bunching Fabrication Constraints in Silicon Carbide
Gordon Phelps
THE EFFECT OF FABRICATION PROCESSES ON ELECTRICAL CHARACTERISATION OF MOSFETS WITH HIGH-K GATE DIELECTRICS
Nipapan Poolamai
The Dependence of Plasma Parameters on the Plasma Induced Damage in Thick SiO2
Jorge Manuel dos Santos
Creating visualization tools for Asynchronous circuit design
Arash Shahriari
Asynchronous system synthesis based on direct mapping using VHDL and Petri nets
Delong Shang
STG Optimisation in the Direct Mapping of Asynchronous Circuits
Danil Sokolov
A Signal ACM using three data slots
Fei Xia
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Last updated 9 February, 2012 © 2013 Newcastle University