The Microelectronics Systems Design (MSD) group conducts research into the design and test of very large scale integrated (VLSI) systems with particular emphasis on systems and circuits that are inherently asynchronous and concurrent in their operation.
Asynchronous Systems: Asynchronous design principles will play an increasingly important role in constructing future systems on a chip, implemented in semiconductor technologies beyond 65 nanometers. In this direction, the group's current focus is on developing new methods and software tools for synthesis and testing of low latency and low power asynchronous circuits, high-level synthesis of asynchronous circuits from widely used hardware description languages, such as Verilog and VHDL, and formal behavioural models, such as Petri nets, modelling and design of asynchronous communication mechanisms, design of on-chip communication links using non-conventional encoding for better performance-power-reliability characteristics (e.g. phase-encoding channels), design of secure and cryptographic hardware, modelling, design and characterisation of synchronisers and arbiters, time measurement and built-in testing techniques. The group has pioneered international research on the use of Signal Transition Graphs for asynchronous CAD. This method underlies a world leading synthesis tool Petrify that has been used within Intel Corp. for designing high-speed interface logic in microprocessors and systems on chips (SoC). In-house software for self-timed circuits is being developed to enhance the industrial design flow for secure systems to be used at Atmel, the world leader in smart card ICs. The group's research on asynchronous communication mechanisms, networks on chip (NoC) and self-timed event processors (STEPs) is being supported by MBDA UK Ltd, while work on metastability characterisation, synchronisation and on-chip timing measurement and test is used within Intel Corporation. Most recent work is also in developing software tools for variability tolerant SoCs in collaboration with Elastix Corporation.
Design for Testability: The group conducts most advanced research into the design for testability and testing for high temperature (320C) system-on-insulator (SOI) technologies. The group leads SETNET (Semiconductor Test Network) established to raise the profile of test engineering, encourage the collaboration of academia and industry on test related issues and provide an infrastructure for the dissemination of information based services. The current membership comprises 170 representatives from semiconductor, test equipment and systems manufacturers, test service providers, fabless semiconductor companies, design houses etc. More recently the group has become involved in the design of asynchronous microprocessor architectures using concurrent error detection techniques, to tolerate soft error upsets.
Logarithmic Scale Processor: Another area of active research involves investigations into logarithmic scale processor structures which offer significant performance and accuracy advantages in building floating-point arithmetic units. A start-up company, Northern Digital, has been formed on the basis of this research and is currently exploiting these methods in designing new generation of graphics acceleration hardware.
Device Modelling, Variability Analysis and Analogue and Mixed Signal Design: The group actively collaborates with the Nano Materials and Electronics group on modelling interconnects in deep-submicron processes and developing a strategy for designing future electronic systems in non-conventional technologies such as strained silicon, SiGe and nanotechnologies. The group is also developing new methods and automated tools for the analysis of the effect of process variability on the parametric variability at the device and circuit level. In its collaboration with colleagues in the Signals and Communications themes the MSD group develops design support for mixed systems, focusing on modelling and characterisation of substrate noise and applying asynchronous design techniques for constructing low power and robust systems for digital signal and image processing.
Synthesis and Model-Checking: The group also actively collaborates with the Theoretical Computer Science group at the School of Computing Science, where the main focus is on synthesis and model-checking of concurrent and discrete-event systems using partial order techniques and Petri nets.