Reliability study of ultra-thin gate oxides on strained-Si/SiGe MOS structures (2006)

Author(s): Varzgar JB, Kanoun M, Uppal S, Chattopadhyay S, Tsang YL, Escobedo-Cousin E, Olsen SH, O'Neill AG, Hellstrom PE, Edholm J, Ostling M, Lyutovich K, Oehme M, Kasper E

    Abstract: The reliability of gate oxides on bulk Si and strained Si (s-Si) has been evaluated using constant voltage stressing (CVS) to investigate their breakdown characteristics. The s-Si architectures exhibit a shorter life time compared to that of bulk Si, which is attributed to higher bulk oxide charges (Qox) and increased surface roughness in the s-Si structures. The gate oxide in the s-Si structure exhibits a hard breakdown (HBD) at 1.9 × 104 s, whereas HBD is not observed in bulk Si up to a measurement period of 1.44 × 105 s. The shorter lifetime of the s-Si gate oxide is attributed to a larger injected charge (Qinj) compared to Qinj in bulk Si. Current–voltage (I–V) measurements for bulk Si samples at different stress intervals show an increase in stress induced leakage current (SILC) of two orders in the low voltage regime from zero stress time to up to 5 × 104 s. In contrast, superior performance enhancements in terms of drain current, maximum transconductance and effective channel mobility are observed in s-Si MOSFET devices compared to bulk Si. The results from this study indicate that further improvement in gate oxide reliability is needed to exploit the sustained performance enhancement of s-Si devices over bulk Si.

      • Journal: Material Science and Engineering B
      • Volume: 135
      • Issue: 3
      • Pages: 203-206
      • Publisher: Elsevier SA
      • Publication type: Article
      • Bibliographic status: Published

      Dr Enrique Escobedo-Cousin
      Research Associate

      Professor Anthony O'Neill
      Siemens Professor of Microelectronics

      Dr Sarah Olsen
      Senior Lecturer