Design of an on-chip random number generator using metastability (2002)

Author(s): Chester EG; Kinniment DJ

    Abstract: This paper shows that the internal noise in a bistable exhibits a Gaussian distribution, and is close to the value expected from thermal agitation. We describe a random number generator based on this property that is capable of on chip integration, and is a primary source of high entropy data at 100 MHz. The device is held close to metastability by a feedback loop, and is therefore relatively insensitive to circuit asymmetries and drift. Measurements of post-processed data from this source also show a relatively high bit rate and sequences of 2/sup 23/ bits are shown to pass stringent tests for randomness.

      • Date: 24-26 September 2002
      • Conference Name: 28th European Solid-State Circuit Conference (ESSCIRC)
      • Pages: 595-598
      • Publication type: Conference Proceedings (inc. abstract)
      • Bibliographic status: Published

        Dr Graeme Chester
        Senior Lecturer