Publication

A low and balanced power implementation of the AES security mechanism using self-timed circuits (2004)

Author(s): Shang D, Burns F, Bystrov A, Koelmans A, Sokolov D, Yakovlev A

  • : A low and balanced power implementation of the AES security mechanism using self-timed circuits

Abstract: The hardware implementation of AES algorithm as an asynchronous circuit has a reduced leakage of information through side-channels and enjoys high performance and low power. Dual-rail data encoding and return-to-spacer protocol are used to avoid hazards, including data-dependent glitches, and in order to make switching activity data-independent (constant). The implementation uses a coarse pipeline architecture which is different from traditional micropipelines. The pipeline stages are complex and have built-in controllers implemented as chains of David cells (special kind of latches), whose behaviour is similar to fine-grain pipelines. A highly balanced security latch is designed. The design is partly speed-independent; in a few places it uses well-localised and justified relative timing assumptions. The security properties of the system are evaluated by extensive simulation and by counting switching activity. (16 References).

Notes: Macii En Paliouras V Koufopavlou O Berlin, Germany. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. 14th International Workshop, PATMOS 2004. Proceedings. Santorini, Greece. 15-17 Sept. 2004.

  • Short Title: A low and balanced power implementation of the AES security mechanism using self-timed circuits
  • Date: 15-17 September 2004
  • Conference Name: Integrated circuit and system design: power and timing modeling, optimization and simulation. 14th International Workshop, PATMOS 2004
  • Volume: 3254
  • Pages: 471-480
  • Publisher: Springer
  • Publication type: Conference Proceedings (inc. abstract)
  • Bibliographic status: Published
    Staff

    Dr Alex Bystrov
    Lecturer

    Dr Albert Koelmans
    Lecturer

    Dr Danil Sokolov
    Research Associate

    Professor Alex Yakovlev
    Professor of Computer System Design