Capacitance-voltage (C-V) technique for the characterisation of stained Si/Si1-xGex hetero-structure MOS devices (2006)

Author(s): Chattopadhyay S, Varzgar JB, Seger J, Tsang YL, Kwa KSK, Olsen SH, O'Neill AG

      • Date: 4-6 January 2006
      • Conference Name: EMPDS (Electronic and Photonic Materials, Devices and Systems)
      • Publication type: Conference Proceedings (inc. abstract)
      • Bibliographic status: Unknown

        Professor Anthony O'Neill
        Siemens Professor of Microelectronics