Author(s): Olsen SH, O'Neill AG, Chattopadhay S, Driscoll LS, Kwa KSK, Paul DJ, Zhang J
Abstract: The performance of single and dual channel strained Si n-MOSFETs fabricated using CMOS process. A TEM image of the strained Si/gate oxide interface was examined. Capacitance-voltage measurement on MOS capacitor was investigated. The gate oxide interface trap density as a function of band gap energy for MOS capacitor fabricated on the single and dual channel architectures was illustrated. Field effect mobility was investigated as a function of vertical effective field on MOSFETs having 10 mu m gate lengths and 5 mu m gate widths. (6 References).