Dr Frank Burns
Guest Member of Staff
- Email: firstname.lastname@example.org
- Telephone: +44 (0) 191 208 2401
Frank received a B.Eng. (Hons) in Electrical and Electronic Engineering from Newcastle University in 1987. His PhD was in Computer Aided Design and verification of VLSI circuits from Newcastle University in 1991.
For his PhD, Frank applied formal methods to the correct synthesis of VLSI circuits. For VLSI synthesis an interactive interface was constructed to explore time and area trade-offs. This used a novel high level synthesis approach. The circuits were subsequently verified using the Boyer Moore theorem prover.
- BESST - a project centred on hardware datapath and control synthesis for systems on chips
- SCREEN - a project centred on security for hardware using circuit balancing techniques
- SURE - a project targeted towards developing hardware for secure systems using solutions based on higher radix
- VARMA - a project to develop a tool to investigate the effects of process variability on nanotechnology devices
- UNCOVER - Frank investigated the causality of deadlocks in Intel's xMAS communication circuits using Structured Occurrence Nets (SONs). The development for this has taken place inside Newcastle's Workcraft framework (workcraft.org).
- Burns F, Sokolov D, Yakovlev A. A Structured Visual approach to GALS Modelling and Verification of Communication Circuits. IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems 2017, 938-951.
- Burns F, Sokolov D, Yakovlev A. GALS synthesis and verification for xMAS models. In: Design And Test Europe (DATE). 2015.
- Burns F, Baz A, Shang D, Yakovlev A. Variability analysis of self-timed SRAM robustness. In: Power and Timing Modelling, Optimization and Simulation (PATMOS). 2013.
- Murphy J, O'Neill M, Burns F, Bystrov A, Yakovlev A. Self-Timed Physically Unclonable Functions. In: New Technologies, Mobility and Security (NTMS). 2012.
- Russell G, Burns F, Yakovlev A. VARMA - Variability Modelling and Analysis Tool. In: Design and Diagnostics of Electronic Circuits and Systems (DDECS). 2012.
- Rafiev A, Mokhov A, Burns F, Murphy J, Koelmans A, Yakovlev A. Mixed-radix Reed Muller Expansions. IEEE Transactions on Computers 2011, 1189-1202.
- Burns F, Bystrov A, Koelmans A, Yakovlev A. Security evaluation of Balanced 1-of-n circuits. IEEE Transactions on Very Large Scale Integrated (VLSI) Systems 2011, 2135-2139.