EEE8100 : Software tools for Digital System Design
- Offered for Year: 2019/20
- Module Leader(s): Dr Alex Bystrov
- Owning School: Engineering
- Teaching Location: Newcastle City Campus
|Semester 2 Credit Value:||10|
To outline the CAD tools and the VLSI design flow in the context of International Technology Roadmap on Semiconductors.
To study design capture, simulation and design synthesis techniques. To understand the characteristics of the algorithms, and hence the strengths and weaknesses of the tools.
To familiarise and to develop skills in operating the industry standard CAD tool.
Outline Of Syllabus
1. The following objectives are attained in about 16 formal lectures
- An overview of existing CAD tools and their evolution projected into the near future according to the International Technology Roadmap on Semiconductors.
- Concurrency: modelling verification and interface protocol capture as a Signal Transition Graph.
- Design capture by using Verilog and VHDL languages. Three levels of system description. Logic synthesis.
- Compact representation of state sets as Binary Decision Diagrams.
- Scheduling of operations and Data Flow Graphs.
2. Problem solving skills are exercised in the tutorials/seminars.
3. The coursework includes familiarisation exercises and a mini-project, within which a student develops a case study by analogy to the offered examples. The coursework develops skills on operating the industry standard CAD tools, on various methods of design capture (schematic, Verilog and VHDL), simulation and debugging.
|Guided Independent Study||Assessment preparation and completion||24||0:30||12:00||Revision for final exam|
|Guided Independent Study||Assessment preparation and completion||1||1:00||1:00||Final exam|
|Scheduled Learning And Teaching Activities||Lecture||2||2:00||4:00||N/A|
|Guided Independent Study||Assessment preparation and completion||1||15:00||15:00||Report|
|Scheduled Learning And Teaching Activities||Practical||1||15:00||15:00||Supervised Practical (coursework)|
|Scheduled Learning And Teaching Activities||Practical||1||3:00||3:00||Hands on tutorial|
|Guided Independent Study||Directed research and reading||13||2:00||26:00||General reading in support of lectures and practicals.|
|Guided Independent Study||Project work||1||24:00||24:00||Design and performance of experiments.|
Teaching Rationale And Relationship
Lectures provide core material and guidance for further reading, problem solving is integrated into lecture structure and computer based learning. The study of the International Technology Roadmap on Semiconductors provides the philosophical understanding of demands of the modern semiconductor design industry.
Practicals develop the skills in using the industry standard tools, which is of direct relevance to employability of graduates.
The mini-project enforces the active learning approach, exercises design skills and faciliitates efficient knowledge/skill transfer through continuous assessment.
The format of resits will be determined by the Board of Examiners
|Report||2||M||75||1500 words excluding the illustrations and appendices, the source code must be attached.|
|Prof skill assessmnt||2||M||25||Presentation|
Assessment Rationale And Relationship
The examination provides the opportunity for students to demonstrate their understanding of the course material. The problem solving aspects of the assessment enable students to demonstrate that they are able to apply this understanding and their analysis and synthesis skills to novel situations.
The assessed report represents the part of the objectives which require the use of the software tools. It also tests the ability to combine various problem-specific parts of knowledge and skills into a complete design experience. It is impossible to design engineering objects without error. The project-type assessment exposes the ability of a student to discover and correct such errors.