EEE8103 : Electronic Device Fabrication

Semester 2 Credit Value: 10
ECTS Credits: 5.0


To provide an advanced knowledge of electronic device manufacture; to explain the importance of yield and reliability; to consider future directions available to electronic device technology.

Outline Of Syllabus

Silicon Epitaxy -
Applications, vapour phase expitaxy, doping and autodoping; molecular beam epitaxy.

Polysilicon Deposition -
Applications, deposition process and rate, electrical characteristics, step coverage, oxidation of polysilicon.

Oxidation -
Uses of thermal oxide and CVD oxide, growth and properties of dry and wet oxide, dopant distribution, oxide quality, CVD process, doped oxide and its applications, step coverage and planarisation; high-k dielectrics.

Metallisation -
Uses and desired properties of metallization, evaporation and sputtering, aluminium, silicide and gold metalisation technology, general properties of mettalisation.

Etching -
Types, etch rate, selectivity, anisotropy, uniformity, case study; reactive ion etching, process monitoring and end point detection, pattern transfer problems, defects and impurities, deep reactive ion etching.

Surface Contamination -
Particles and films, sources of contamination, cleaning methods; photoresist removal.

Process Monitoring -
Junction depth, resistivity and sheet resistance, Hall effect, majority carrier mobility, doping profiles, current-voltage characteristics, line width.

Deep Submicron Lithography -
G Line, I line, Deep UV, resolution, depth of focus, phase shift lithography, electron beam lithography, x-ray lithography, costs.

Interconnect -
Need for planar process, CR delay, material system wish list, electromigration and reliability, median time to failure.

Doping Technology -
Ion implantation, equipment, masking, dopant profiles, channelling, implantation damage, annealing, diffusion doping.

New materials and technologies -
Novel gate stacks (metal gates, high k dielectrics, atomic layer deposition), new channel materials (strained Si/SiGe), SiC for high temperature electronics, advanced interconnect (Cu-low k), nanotechnology.

Teaching Methods

Teaching Activities
Category Activity Number Length Student Hours Comment
Scheduled Learning And Teaching ActivitiesLecture122:0024:00N/A
Guided Independent StudyAssessment preparation and completion240:3012:00Revision for final exam
Guided Independent StudyAssessment preparation and completion12:002:00Final exam
Guided Independent StudyIndependent study162:0062:00Writing up lecture notes; general reading
Jointly Taught With
Code Title
EEE8019Advanced Device Fabrication
Teaching Rationale And Relationship

Lectures provide core material and guidance for further reading. Problem solving and practice are integrated into the core lecture structure.

Assessment Methods

The format of resits will be determined by the Board of Examiners

Description Length Semester When Set Percentage Comment
Written Examination1202A100N/A
Exam Pairings
Module Code Module Title Semester Comment
Assessment Rationale And Relationship

Exam provides opportunity for students to demonstrate their knowledge and skills developed from lecture course material.

Reading Lists