Module Catalogue 2018/19

EEE8073 : Coursework (Microelectronics)

  • Offered for Year: 2018/19
  • Module Leader(s): Dr Alex Bystrov
  • Lecturer: Dr Sergei Simdyankin
  • Owning School: Engineering
  • Teaching Location: Newcastle City Campus
Semesters
Semester 2 Credit Value: 15
ECTS Credits: 8.0
Pre Requisites
Pre Requisite Comment

N/A

Co Requisites
Co Requisite Comment

N/A

Aims

The aim is to provide the student with experience of the use of industry standard commercial software packages for design and simulation of semiconductor devices, processes and circuits. The student will also develop important transferable skills like planning and organising, working practices, general techniques for simulation and report preparation.

Outline Of Syllabus

Design capture as a VHDL/Verilog program and as a schematic diagram, static delay anaysis, digital simulation, analogue simulation, hierarchical design.

Design capture of a standard n-MOS specification and design of a deep submicron n-MOS device. The deep submicron n-MOS device is then changed into a p-MOS device. Analysis of the electrical characteristics, channel doping, threshold voltage, electrical field, etc. is performed.

Learning Outcomes

Intended Knowledge Outcomes

Knowledge of which design tools and methods are appropriate for solving complex VLSI design problems. Relationship between the CAD tool and the theory of electronic engineering.

Knowledge of design methodology behind the commercial device simulators; how to simulate a CMOS process; how to fix the dimensional parameters of a CMOS structure, how to analyse the characteristics of a CMOS device.

Relationship between design and theory of MOSFETs provided in EEE taught modules.

Intended Skill Outcomes

The use of the industry standard CAD tool (Cadence) and design practice.
The use of standard commercial simulation tools (MEDICI) and design practice.

Graduate Skills Framework

Graduate Skills Framework Applicable: Yes
  • Cognitive/Intellectual Skills
    • Critical Thinking : Present
    • Data Synthesis : Assessed
    • Numeracy : Assessed
    • Literacy : Assessed
    • Information Literacy
      • Synthesise And Present Materials : Assessed
      • Use Of Computer Applications : Assessed
  • Self Management
    • Planning and Organisation
      • Goal Setting And Action Planning : Assessed
      • Decision Making : Assessed
    • Personal Enterprise
      • Innovation And Creativity : Assessed
      • Initiative : Assessed
      • Problem Solving : Assessed
  • Interaction
    • Communication
      • Written Other : Assessed

Teaching Methods

Teaching Activities
Category Activity Number Length Student Hours Comment
Scheduled Learning And Teaching ActivitiesLecture52:0010:00N/A
Guided Independent StudyAssessment preparation and completion160:0060:00Report
Scheduled Learning And Teaching ActivitiesPractical83:0024:00N/A
Guided Independent StudyProject work122:0024:00Design and performance of experiments.
Guided Independent StudyIndependent study132:0032:00General reading.
Total150:00
Teaching Rationale And Relationship

In the limited number of lectures the overview of methods, tools and design challenges (as summarised in ITRS documents) will be given. This broad view at the subject area is refined by the study of a number of design tools included in MEDICI and Cadence software packages. The knowledge is reinforced in the practicals forming the main part of the module. The practicals develop essential skills in using the industry standard tools. The hands-on tutorials present and explain the examples, which serve as a basis for the individual work.

Reading Lists

Assessment Methods

The format of resits will be determined by the Board of Examiners

Other Assessment
Description Semester When Set Percentage Comment
Report2A100Individual report containing the evidence and analysis of practical results, 4000 words
Assessment Rationale And Relationship

The written report must fulfil the SOLO criteria for the extended abstract type work. As such, it must contain the following parts: Aims and Objectives, Introduction, Results, Discussion, Conclusions and References. All the learning outcomes defined above must be reflected in the report. The adequate guidance on report writing will be provided by the academic staff.

Up to 50% of the report can be replaced with equivalent content in the form of tables, diagrams, equations and screen shots. Any illustrative material must be adequately integrated and discussed in the main text. The report must include the summary of the results of 3 hours reading of the current edition of ITRS document; the reading time is included into the private study article.

Timetable

Past Exam Papers

General Notes

Original Handbook text:
The lecture and tutorial notes are provided. A student is expected to write a short review of available publications in the introduction.

Gerez, Sabih H. Algorithms for VLSI design automation. Wiley, 1999
Russell, G. Computer aided tools for VLSI system design. Peregrinus on behalf of the Institution of Electrical Engineers, 1987
Lipsett, Roger, Schaefer, Carl F., Ussery, Cary. VHDL : hardware description and design. Kluwer Academic Publishers, 1989
Ivan Sutherland, Robert F. Sproull, David Harris. 1999. Logical Effort: Designing Fast CMOS Circuits. The Morgan Kaufmann Series in Computer Architecture and Design.

Disclaimer: The information contained within the Module Catalogue relates to the 2018/19 academic year. In accordance with University Terms and Conditions, the University makes all reasonable efforts to deliver the modules as described. Modules may be amended on an annual basis to take account of changing staff expertise, developments in the discipline, the requirements of external bodies and partners, and student feedback. Module information for the 2018/19 entry will be published here in early-April 2018. Queries about information in the Module Catalogue should in the first instance be addressed to your School Office.