Staff Profile

Farhad Merchant received his Ph.D. from the Indian Institute of Science, Bangalore (India), in 2016. His Ph.D. thesis title was "Algorithm-Architecture Co-design for Dense Linear Algebra Computations." He received the DAAD fellowship during his Ph.D. He worked as a postdoctoral research fellow at Nanyang Technological University (NTU), Singapore, from March 2016 to December 2016. In December 2016, he moved to Corporate Research at Robert Bosch in Bangalore as a Researcher, where he worked on numerical methods for ordinary differential equations. He joined Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, in December 2017 as a postdoctoral research fellow in the Chair for Software for Systems on Silicon. Farhad was the recipient of the HiPEAC technology transfer award in 2019 and the best paper award at ISQED 2022. In addition, he was awarded a Minerva Short-Term fellowship in 2022 to visit the Technion - Israel Institute of Technology in Israel. Currently, Farhad is a Lecturer in the School of Engineering at Newcastle University, UK.

• Hardware Security
• Neuromorphic Computing
• In-Memory Computing
• Algorithm-architecture Co-design
• Reconfigurable Computing
• Computer Arithmetic

• Articles

  • Sharma NN, Jain R, Pokkuluri MM, Patkar SB, Leupers R, Nikhil RS, Merchant F. CLARINET: A quire-enabled RISC-V-based framework for posit arithmetic empiricism. Journal of Systems Architecture 2023, 135, 102801.
  • Sisejkovic D, Merchant F, Reimann L, Leupers R. Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2022, 41(6), 1716-1729.
  • Staudigl F, Merchant F, Leupers R. A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security. IEEE Design & Test 2022, 39(2), 90-99.
  • Sisejkovic D, Merchant F, Reimann L, Srivastava H, Hallawa A, Leupers R. Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach. ACM Journal on Emerging Technologies in Computing Systems 2021, 17(3), 30.
  • Nambi S, Ullah S, Sahoo S, Lohana A, Merchant F, Kumar A. ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems. IEEE Access 2021, 9, 103691-103708.
  • Vreca J, Sturm K, Gungl E, Merchant F, Bientinesi P, Leupers R, Brezocnik Z. Accelerating Deep Learning Inference in Constrained Embedded Devices Using Hardware Loops and a Dot Product Unit. IEEE Access 2020, 8, 165913-165926.

• Conference Proceedings (inc. Abstracts)

  • Singh Simranjeet, Zahoor Furqan, Rajendran Gokulnath, Patkar Sachin, Chattopadhyay Anupam, Merchant Farhad. Hardware Security Primitives using Passive RRAM Crossbar Array: Novel TRNG and PUF Designs. In: 28th Asia and South Pacific Design Automation Conference (ASP-DAC 2023). 2023, Tokyo, Japan: ACM.
  • Raj Anand, Das Pabitra, Sisejkovic Dominik, Avula Nikhitha, Merchant Farhad, Acharyya Amit. DeepAttack: a Deep Learning Based Oracle-Less Attack on Logic Locking. In: IEEE ISCAS 2023. 2023, Monterey: Institute of Electrical and Electronics Engineers.
  • Merchant F. Security as an Important Ingredient in Neuromorphic Engineering. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2022). 2022, Nicosia, Cyprus: IEEE.
  • Moussavi E, Sisejkovic D, Brings F, Kizatov D, Singh A, Vu Thang, Ingebrandt S, Leupers R, Pachauri V, Merchant F. pHGen: A pH-Based Key Generation Mechanism Using ISFETs. In: IEEE International Workshop on Hardware-Oriented Security and Trust (HOST) 2022. 2022, McLean, VA, USA: Institute of Electrical and Electronics Engineers.
  • Singh S, Bodapati S, Patkar S, Leupers R, Chattopadhyay A, Merchant F. PA-PUF: A Novel Priority Arbiter PUF. In: 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC). 2022, Patras, Greece: Institute of Electrical and Electronics Engineers.
  • Galicia M, Menzel S, Merchant F, Müller M, Chen H-Y, Zhao Q-T, Cüppers F, Jalil A, Shu Q, Schüffelgen P, Mussler G, Funck C, Lanius C, Wiefels S, Witzleben M, Bengel C, Kopperberg N, Ziegler T, Walied R, Krüger A, Pöhls L, Dittmann R, Hoffmann-Eifert S, Rana V, Grützmacher D, Wuttig M, Wouters D, Vescan A, Gemmeke T, Knoch J, Lemme M, Leupers R, Waser R. NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future. In: 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE). 2022, Antwerp, Belgium: IEEE.
  • Staudigl Felix, Indari Hazem, Schön Daniel, Sisejkovic Dominik, Merchant Farhad, Joseph Jan, Rana Vikas, Menzel Stephan, Leupers Rainer. NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories. In: 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE). 2022, Antwerp, Belgium: IEEE.
  • Gansen M, Lou J, Freye F, Gemmeke T, Merchant F, Zeyer A, Zeineldeen M, Schlüter R, Fan X. Discrete Steps towards Approximate Computing. In: 2022 23rd International Symposium on Quality Electronic Design (ISQED). 2022, Santa Clara, CA, USA: Institute of Electrical and Electronics Engineers.
  • Moussavi E, Sisejkovic D, Singh A, Kizatov D, Leupers R, Ingebrandt S, Pachauri V, Merchant F. A Temperature Independent Readout Circuit for ISFET-Based Sensor Applications. In: 23rd Latin American Test Symposium (LATS 2022). 2022, Montevideo, Uruguay: IEEE.
  • Galicia M, Merchant F, Leupers R. A Parallel SystemC Virtual Platform for Neuromorphic Architectures. In: 23rd International Symposium on Quality Electronic Design (ISQED). 2022, Santa Jose, California, USA: Institute of Electrical and Electronics Engineers.
  • Rai S, Garg S, Pilato C, Karri R, Herdt V, Drechsler R, Moussavi E, Sisejkovic D, Merchant F, Kumar A. Vertical IP Protection of the Next-Generation Devices: Quo Vadis?. In: Design, Automation & Test in Europe Conference & Exhibition (DATE 2021). 2021, Grenoble, France: IEEE.
  • Reimann L, Hanel L, Sisejkovic D, Merchant F, Leupers R. QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog. In: 2021 IEEE 39th International Conference on Computer Design (ICCD). 2021, Storrs, CT, USA: IEEE.
  • Polian I, Altmann F, Arul T, Boit C, Brederlow R, Davi L, Drechsler R, Du N, Eisenbarth T, Guneysu T, Hermann S, Hiller M, Leupers R, Merchant F, Mussenbrock T, Katzenbeisser S, Kumar A, Kunz W, Mikolajick T, Pachauri V, Seifert J-P, Torres F, Trommer J. Nano Security: From Nano-Electronics to Secure Systems. In: Design, Automation & Test in Europe Conference & Exhibition (DATE 2021). 2021, Grenoble, France: IEEE.
  • Sisejkovic D, Reimann L, Moussavi E, Merchant F, Leupers R. Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities. In: IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC 2021). 2021, Singapore: IEEE.
  • Saxena V, Merchant F, Reddy A, Neudorfer J, Nambiar S, Leupers R. Brightening the Optical Flow through Posit Arithmetic. In: 22nd International Symposium on Quality Electronic Design (ISQED 2021). 2021, Santa Clara, CA, USA: IEEE.
  • Merchant F, Sisejkovic D, Reimann LM, Yasotharan K, Grass T, Leupers R. ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework. In: 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems (VLSID 2021). 2021, Guwahati, India: IEEE.
  • Alouani I, Khalifa A, Merchant F, Leupers R. An Investigation on Inherent Robustness of Posit Data Representation. In: 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID 2021). 2021, Guwahati, India: IEEE.