Mohammed Al-Daloo
On-chip interconnected modelling and a bootstrapped driver scheme.
Email: m.i.t.tawfeeq@ncl.ac.uk
Supervisors
Project description
I am currently working on modelling of on chip interconnection to include its frequency dependent effects. I have based the modelling approach on fractional calculus. This will achieve the simplest adaptable model with the highest possible accuracy.
I am also working on a driver scheme which uses a bootstrap circuitry to address ultra-low power (ULP) design limitations. This involves studying and mitigating the effects of single-event upsets (SEU). These are known to affect DSM circuits working under low voltages.
Publications
- Al-Daloo M, Yakovlev A, Halak B. Energy Efficient Bootstrapped CMOS Inverter for Ultra-Low Power Applications. In: 23rd IEEE International Conference on Electronics Circuits and Systems. 2016, Monte Carlo, Monaco: Institute of Electrical and Electronics Engineers.
- Al-Daloo M, Soltan MA-DA, Yakovlev A. Overview study of on-chip interconnect modelling approaches and its trend. In: 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018. 2018, Thessaloniki, Greece: Institute of Electrical and Electronics Engineers Inc.
Interests
Electrical and electronics engineering, Electronics and Communication Engineering, Signal Processing and Internet of things (IoT).
Qualifications
BEng (Computer Engineering), Electrical and Electronics College, Iraq (2003).
Advance modelling for on-chip interconnecting on ResearchGate