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Module

EEE8124 : Low-Power VLSI Design

  • Offered for Year: 2022/23
  • Module Leader(s): Professor Alex Yakovlev
  • Owning School: Engineering
  • Teaching Location: Newcastle City Campus
Semesters
Semester 2 Credit Value: 20
ECTS Credits: 10.0

Aims

To introduce the students to the fundamentals of power-efficient VLSI design and provide them with the essential knowledge about the main themes, so that, in future, the students will be able to readily apply this knowledge in industry or research or further in by self-study. It will also give the student knowledge of the importance of design for low power in modern systems-on-chip, and present methods for achieving energy-efficient solutions in ubiquitous computing applications, such as Internet of Things.

Outline Of Syllabus

Transistor topology; transistor equations; CMOS process steps; fabrication; yield; design rules for custom layout; alternative inverter designs. Complex gates; pseudo NMOS; dynamic logic; dynamic cascaded logic; domino logic; 2 and 4 phase logic; pass transistor logic. Control and timing; synchronous and asynchronous; self-timed systems; multi-phase clocks; register transfer; examples of ALU, shifters, and registers. Serial addition; bit-serial multipliers; systolic arrays; analogue voltage dividers; current mirrors; differential amplifiers; wide range amplifiers. Effects of scaling circuit dimensions; physical limits to develop fabrication. Optional extended course work for final year students, using VLSI design software to produce a chip to meet a given specification; the chip may be fabricated if the design is successful. To study the different stages in the design of integrated chip using VLSI design software. The design is to meet a given specification. Alternative high-level structures, analogue function for specific applications.

Power consumption issues in deep-submicron systems and technologies. Static (leakage) power and dynamic (switching) power. Modelling and analysis of power consumption at the transistor, logic and architecture levels. Design techniques for low power at transistor, logic, architecture and programming level. Voltage/frequency scaling, body biasing, clock scaling, ultra low-power design; high-level synthesis of low-power design. Using asynchronous design methodologies for low power design and power-modulated computing, including description languages such as Signal Transition Graphs and Petri nets.
Design of asynchronous logic using CAD tools, including Newcastle’s open source tools such as Workcraft and interfaces to commercial tools. Design of low power systems from the industrial perspective.

Teaching Methods

Teaching Activities
Category Activity Number Length Student Hours Comment
Scheduled Learning And Teaching ActivitiesLecture162:0032:004x2hr lectures per week over 4 weeks
Structured Guided LearningLecture materials360:3018:00Non-synchronous recordings to support lectures
Guided Independent StudyAssessment preparation and completion13:003:00Final Exam in Assessment Period
Guided Independent StudyAssessment preparation and completion361:0036:00Revision for final exam
Structured Guided LearningStructured research and reading activities82:0016:00Reading activity to supplement knowledge of material taught in each week.
Scheduled Learning And Teaching ActivitiesWorkshops81:008:001hr online synchronous tutorial per week, covering tutorial sheets.
Guided Independent StudyIndependent study169:0069:00Reviewing lecture notes; general reading
Guided Independent StudyIndependent study360:3018:00Student study time of non-synchronous pre-recorded material
Total200:00
Teaching Rationale And Relationship

Non-synchronous videos and face-to-face lectures provides the core material and synchronous review sessions give students the opportunity to query material taught in that week. Face-to-face lectures can be replaced with online synchronous sessions support by non-synchronous videos if the public health situation requires it.

Problem solving is introduced and practiced through synchronous tutorial sessions.

Assessment Methods

The format of resits will be determined by the Board of Examiners

Exams
Description Length Semester When Set Percentage Comment
Written Examination1802A100Choice of 4 question from 3 from VLSI Design and 3 from Low Power
Exam Pairings
Module Code Module Title Semester Comment
2N/A
Formative Assessments
Description Semester When Set Comment
Written exercise2MTutorial Question on VLSI Design set in the middle of the semester
Assessment Rationale And Relationship

Lectures provide the core material as well as guidance for further reading. Problem practice is integrated into lecture structure, examples given in the use of the software tools.

The examination provides the opportunity for the students to demonstrate their understanding of the course material and their ability to apply critical thinking. The problem solving aspects of the assessment enable the student to demonstrate that they are able to apply this understanding and their analysis and synthesis skills to novel situations.

Reading Lists

Timetable