ENG2025 : Digital Electronics
- Offered for Year: 2022/23
- Module Leader(s): Dr Domenico Balsamo
- Owning School: Engineering
- Teaching Location: Newcastle City Campus
Semesters
| Semester 2 Credit Value: | 10 |
| ECTS Credits: | 5.0 |
Aims
To enable students to command the essential principles of digital logic systems as used for control, communications and information processing.
To enable the student to design such systems.
To study the operation and performance of computer arithmetic circuits, synchronous and asynchronous sequential logic circuits.
Outline Of Syllabus
Logic Design and VHDL
Review of techniques for logic design, from discrete logic gates to ASICs; The VHDL language as a tool for digital design; FPGA and PLA architectures.
Arithmetic Circuits
Combinational logic circuits for the parallel adder; carry propagation; carry look-ahead; subtraction; logic functions; the ALU; multiplication and shifting; serial multipliers: parallel and carry save methods.
Sequential Logic Synchronous systems
Finite state machines; state assignment; synthesis of synchronous FSMs; implementation methods; memory and combinational logic; examples of implementation of controllers and algorithms.
Asynchronous systems
Fundamental mode; implementation of a primitive flow table; races; metastability and synchronisation failure.
Teaching Methods
Teaching Activities
| Category | Activity | Number | Length | Student Hours | Comment |
|---|---|---|---|---|---|
| Scheduled Learning And Teaching Activities | Lecture | 22 | 1:00 | 22:00 | 2x1hr lectures per week over 11 weeks |
| Guided Independent Study | Assessment preparation and completion | 1 | 11:00 | 11:00 | Open book assignment (problem solving) (9 hours of budgeted prep time +1 hour NUMBAS assessment |
| Guided Independent Study | Assessment preparation and completion | 40 | 1:00 | 40:00 | General reading; reviewing lecture notes; solving practical problems |
| Guided Independent Study | Assessment preparation and completion | 28 | 0:30 | 14:00 | Revision for Exam |
| Guided Independent Study | Assessment preparation and completion | 1 | 2:00 | 2:00 | Written exam |
| Scheduled Learning And Teaching Activities | Practical | 11 | 1:00 | 11:00 | VHDL hardware description language |
| Total | 100:00 |
Teaching Rationale And Relationship
Lectures provide core material and guidance for further reading, problem solving practice is provided through tutorials. Work is further re-enforced through the laboratory session.
Assessment Methods
The format of resits will be determined by the Board of Examiners
Exams
| Description | Length | Semester | When Set | Percentage | Comment |
|---|---|---|---|---|---|
| Written Examination | 120 | 2 | A | 80 | Exam workload 2 hours. |
Other Assessment
| Description | Semester | When Set | Percentage | Comment |
|---|---|---|---|---|
| Prob solv exercises | 2 | M | 20 | Solution to problems |
Assessment Rationale And Relationship
The examination provides opportunity for the student to demonstrate their understanding of the course material. The problem solving aspects of the assessment enable students to demonstrate that they are able to apply this understanding and their analysis and synthesis skills to novel situations. The in-course assessments (problem solving exercises) provide the opportunity for students to demonstrate their abilities under open book conditions.
Reading Lists
Timetable
- Timetable Website: www.ncl.ac.uk/timetable/
- ENG2025's Timetable